Table 6-25: 160X160 Sharp 'Direct' Hr-Tft Panel Vertical Timing - Epson S1D13706 Technical Manual

Embedded memory lcd controller
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Table 6-25: 160x160 Sharp 'Direct' HR-TFT Panel Vertical Timing

Symbol
Vertical total period
t1
Vertical display start position
t2
Vertical display period
t3
Vertical sync pulse width
t4
FPFRAME falling edge to GPIO1 alternate timing start
t5
GPIO1 alternate timing period
t6
FPFRAME falling edge to GPIO0 alternate timing start
t7
t8
GPIO0 alternate timing period
t9
GPIO1 first pulse rising edge to FPLINE rising edge
t10
GPIO1 first pulse width
t11
GPIO1 first pulse falling edge to second pulse rising edge
t12
GPIO1 second pulse width
t13
GPIO0 falling edge to FPLINE rising edge
t14
GPIO0 low pulse width
1. Ts
= pixel clock period
Hardware Functional Specification
Issue Date: 01/11/13
Parameter
Min
Typ
Max
203
264
40
160
2
5
4
40
162
4
48
40
48
4
24
Page 79
Units
Lines
Lines
Lines
Lines
Lines
Lines
Lines
Lines
Ts (note 1)
Ts
Ts
Ts
Ts
Ts
S1D13706
X31B-A-001-08

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