S1D13706 Host Bus Interface; Host Bus Interface Pin Mapping - Epson S1D13706 Technical Manual

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3 S1D13706 Host Bus Interface

Interfacing to 8-bit Processors

Issue Date: 01/02/23

The S1D13706 directly supports multiple processors. The S1D13706 implements a 16-bit

Generic #2 Host Bus Interface which can be adapted for use with an 8-bit processor.

The Generic #2 Host Bus Interface is selected by the S1D13706 on the rising edge of

RESET#. After RESET# is released, the bus interface signals assume their selected config-

uration. For details on the S1D13706 configuration, see Section 4.2, "S1D13706 Hardware

Configuration" on page 12.

The following table shows the functions of each Host Bus Interface signal.

Table 3-1: Host Bus Interface Pin Mapping

Byte High Enable (BHE#)

Memory/Register Select

connect to HIO V

Inverted RESET

External decode required

X31B-G-015-02

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