General Io Pins Registers - Epson S1D13706 Technical Manual

Page 122

8.3.8 General IO Pins Registers

General Purpose IO Pins Configuration Register 0
REG[A8h]
GPIO6 Pin IO
n/a
Configuration
7 6
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
General Purpose IO Pins Configuration Register 1
REG[A9h]
GPIO Pin
Input Enable
7 6
bit 7
S1D13706
X31B-A-001-08
GPIO5 Pin IO GPIO4 Pin IO
Configuration Configuration
5
Note
1
If CNF3 = 0 at RESET#, then all GPIO pins are configured as outputs only and this
register has no effect. This case allows the GPIO pins to be used by the HR-TFT/D-TFD
panel interfaces. For a summary of GPIO usage for HR-TFT/D-TFD, see Table 4-10:
"LCD Interface Pin Mapping," on page 31.
2
The input functions of the GPIO pins are not enabled until REG[A9h] bit 7 is set to 1.
GPIO6 Pin IO Configuration
When this bit = 0 (default), GPIO6 is configured as an input pin.
When this bit = 1, GPIO6 is configured as an output pin.
GPIO5 Pin IO Configuration
When this bit = 0 (default), GPIO5 is configured as an input pin.
When this bit = 1, GPIO5 is configured as an output pin.
GPIO4 Pin IO Configuration
When this bit = 0 (default), GPIO4 is configured as an input pin.
When this bit = 1, GPIO4 is configured as an output pin.
GPIO3 Pin IO Configuration
When this bit = 0 (default), GPIO3 is configured as an input pin.
When this bit = 1, GPIO3 is configured as an output pin.
GPIO2 Pin IO Configuration
When this bit = 0 (default), GPIO2 is configured as an input pin.
When this bit = 1, GPIO2 is configured as an output pin.
GPIO1 Pin IO Configuration
When this bit = 0 (default), GPIO1 is configured as an input pin.
When this bit = 1, GPIO1 is configured as an output pin.
GPIO0 Pin IO Configuration
When this bit = 0 (default), GPIO0 is configured as an input pin.
When this bit = 1, GPIO0 is configured as an output pin.
5
GPIO Pin Input Enable
This bit is used to enable the input function of the GPIO pins. It must be changed to a 1
after power-on reset to enable the input function of the GPIO pins (default is 0).
GPIO3 Pin IO GPIO2 Pin IO
Configuration Configuration
4 3
n/a
4 3
Epson Research and Development
Vancouver Design Center
Read/Write
GPIO1 Pin IO GPIO0 Pin IO
Configuration Configuration
2 1
Read/Write
2 1
Hardware Functional Specification
Issue Date: 01/11/13
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