Mcf5307 To S1D13706 Interface; Hardware Description - Epson S1D13706 Technical Manual

Epson Research and Development
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4 MCF5307 To S1D13706 Interface

4.1 Hardware Description

Note:
When connecting the S1D13706 RESET# pin, the system designer should be aware of all
conditions that may reset the S1D13706 (e.g. CPU reset can be asserted during wake-up
from power-down modes, or during debug states).
Figure 4-1: Typical Implementation of MCF5307 to S1D13706 Interface
Interfacing to the Motorola MCF5307 "ColdFire" Microprocessor
Issue Date: 01/02/23
The interface between the S1D13706 and the MCF5307 requires no external glue logic.
The polarity of the WAIT# signal must be selected as active high by connecting CNF5 to
NIO V (see Table 4-1:, "Summary of Power-On/Reset Configuration Options," on
DD
page 14).
The following diagram shows a typical implementation of the MCF5307 to S1D13706
interface.
MCF5307
A[16:0]
D[23:16]
D[31:24]
A17
CS4
TA
BWE1
BWE0
OE
BCLK0
S1D13706
AB[16:0]
DB[7:0]
DB[15:8]
M/R#
CS#
HIO V
DD
BS#
WAIT#
WE1#
WE0#
RD/WR#
RD#
CLKI
RESET#
System RESET
Page 13
S1D13706
X31B-G-010-02