Cpu Interface Timing; Figure 6-2: Generic #1 Interface Timing - Epson S1D13706 Technical Manual

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6.2 CPU Interface Timing

6.2.1 Generic #1 Interface Timing
CLK
A[16:1]
M/R#
CS#
RD0#,RD1#
WE0#,WE1#
WAIT#
D[15:0](write)
D[15:0](read)
S1D13706
X31B-A-001-08
The following section includes CPU interface AC Timing for both 2.0V and 3.3V. The
2.0V timings are based on HIO V
HIO V = Core V = 3.3V.
DD DD
T t1 t2
CLK
t3
t5
t8
t9
t11
t13

Figure 6-2: Generic #1 Interface Timing

= Core V = 2.0V. The 3.3V timings are based on
DD DD
t7
t14
VALID
Epson Research and Development
Vancouver Design Center
t4
t6
t10
t12
t15
Hardware Functional Specification
Issue Date: 01/11/13