Configuration Jumpers - Epson S1D13706 Technical Manual

Epson Research and Development
Vancouver Design Center

3.2 Configuration Jumpers

Jumper Function
JP1 GPIO0 Connection
JP2 CLKI2 Source
JP3 CLKI Source
JP4 GP0 Polarity on H1
Contrast adjust for +ve LCD bias
JP5
(VDDH)
JP6 LCD Panel Voltage
Contrast adjust for -ve LCD bias
JP7
(VLCD)
= recommended settings
Note
S5U13706B00C Rev. 1.0 Evaluation Board User Manual
Issue Date: 01/02/23
The S5U13706B00C has seven jumper blocks which configure various setting on the
board. The jumper positions for each function are shown below.
Table 3-2: Jumper Summary
Position 1-2
GPIO0 connected to SW1-
9 for hardware video invert
MCLKOUT from clock
synthesizer
VCLKOUT from clock
synthesizer
Normal (Active High)
Software controlled
+5V LCDVCC
Software controlled
JP1 - GPIO0 Connection
JP1 selects whether GPIO0 is connected to SW1-9. SW1-9 is used to enable hardware video
invert on the S1D13706.
When the jumper is on (position 1-2), SW1-9 controls the hardware video invert feature
(default setting).
When the jumper is off, the hardware video invert feature is disabled. This setting must be
used for HR/TFT and D-TFD panels as GPIO0 is required in each panels LCD interface pin
mapping. Refer to the S1D13706 Hardware Functional Specification, document number
X28B-A-001-xx for details.
When configured for Sharp HR-TFT or Epson D-TFD panels, JP1 must be set to no
jumper and JP6 must be set to position 2-3.
Figure 3-2: Configuration Jumper (JP1) Location
Position 2-3
—
External oscillator (U5)
External oscillator (U6)
Inverted (Active Low)
Manual controlled
+3.3V LCDVCC
—
JP1
GPIO0 connected GPIO0 disconnected
to SW1-9
Page 11
No Jumper
GPIO0 disconnected from
SW1-9 for direct
HR/TFT/D-TFD or GPIO
testing
—
—
—
—
—
Manual controlled
from SW1-9
S1D13706
X31B-G-004-04