Figure 6-29: Tft A.c. Timing - Epson S1D13706 Technical Manual

Embedded memory lcd controller
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Page 74
FPFRAME
FPLINE
FPLINE
DRDY
t9
t10 t11
FPSHIFT
FPDAT[17:0]
Note: DRDY is used to indicate the first pixel
S1D13706
X31B-A-001-08
t2
t3
t5
t6
t12
invalid

Figure 6-29: TFT A.C. Timing

Epson Research and Development
Vancouver Design Center
t1
t4
t7
t13
t15 t16
1
2
319
Hardware Functional Specification
t8
t14
320
invalid
Issue Date: 01/11/13

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