Epson S1D13706 Technical Manual page 631

Embedded memory lcd controller

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Epson Research and Development

Vancouver Design Center

Table 3-1: Host Bus Interface Pin Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 4-1: Summary of Power-On/Reset Configuration Options . . . . . . . . . . . . . . . . . . . 12

Table 4-2: CLKI to BCLK Divide Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Table 4-3: WS Bit Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 4-1: Typical Implementation of MC68VZ328 to S1D13706 Interface . . . . . . . . . . . . . 11

Interfacing to the Motorola MC68VZ328 Dragonball Microprocessor

Issue Date: 01/02/26

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X31B-G-016-02

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