Table 4-1: Cflga Pin Mapping; Pinout Diagram - Cflga - 104Pin; Figure 4-2: Pinout Diagram - Cflga - 104Pin (S1D13706B00A) - Epson S1D13706 Technical Manual

Epson Research and Development
Vancouver Design Center

4.2 Pinout Diagram - CFLGA - 104pin

L
NC
K
J
NIOVDD FPFRAME
H
FPDAT1 FPDAT0
G
FPDAT5 FPDAT4
F
FPDAT10 FPDAT7
E
FPDAT11 FPDAT9
D
NIOVDD FPDAT12
C
NC FPDAT15
B
NC
A
1
Hardware Functional Specification
Issue Date: 01/11/13
L
K
J
H
G
F
E
D
C
B
A
1 2 3

Figure 4-2: Pinout Diagram - CFLGA - 104pin (S1D13706B00A)

Table 4-1: CFLGA Pin Mapping

NIOVDD GPIO0
GPO GPIO2
FPLINE CVOUT
FPSHIFT FPDAT2
FPDAT3 FPDAT6
FPDAT8 VSS
FPDAT13 FPDAT16
FPDAT14 CNF7
FPDAT17 CNF5
CLKI2 CNF6
NIOVDD CNF4
2 3 4
4 5 6 7 8 9
BOTTOM VIEW
GPIO4 COREVDD DB0
GPIO6 GPIO5 DB2
GPIO3 PWMOUT DB1
DRDY GPIO1 DB3
VSS NC VSS
VSS NC NC
VSS NC VSS
CNF3 AB13 AB11
CNF1 TESTEN AB14
CNF0 AB15 AB16
CNF2 COREVDD AB12
5 6 7
10 11
DB4 DB6
DB8 DB9
DB5 DB7 DB11
DB10 DB13 DB14
WE1# CLKI DB15
VSS BS# RD/WR#
AB1 M/R# WE0#
AB7 AB3 CS#
AB9 AB5 AB2
AB8 AB4
AB10 AB6
8 9 10
Page 19
NC
HIOVDD
DB12
WAIT#
RESET#
RD#
AB0
HIOVDD
NC
11
S1D13706
X31B-A-001-08